Physical insight of junctionless transistor with simulation study of Strained channel

B Vandana, B S Patro, J K Das, S K Mohapatra

Abstract


The article inquest towards junctionless transistor exploiting channel engineering technique with (Si1-xGex). An accurate and deep understanding of the gated resister with demonstration of lower off-state current, improve on-state drain current and transconductance with its conventional counterpart using numerical simulation. The strain is to improve the electron mobility with high electric field and to reduce the scattering rate across the channel. SGOI-JLCT have a great potential for low power switching applications.

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References


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